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| THURSDAY, June 10, 2004, 2:00 PM - 4:00 PM | Room: 6D | ||
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TOPIC AREA: LOGIC DESIGN AND TEST | ||
| SESSION 49 | |||
| New Frontiers in Logic Synthesis | |||
| Chair: Jordi Cortadella - Univ. Polytechnica De Catalunya, Barcelona, Spain | |||
| Organizers: Leon Stok, Steven M. Nowick | |||
| The first paper presents a novel approach to delay variation tolerance through "voting structures". The second paper optimizes domino circuits by eliminating the need for full logic duplication. Multiplication by constants is an important problem in DSPs, and the third paper proposes a new dag fusion approach for sharing adders. The fourth paper describes simple heuristics for decomposing asynchronous controller specifications. The last two papers extend synthesis into the quantum domain. | |||
 49.1 |
Re-Synthesis for Delay Variation Tolerance |
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| Speaker(s): | Cheng-Tao Hsieh - National Tsing-Hua Univ., Hsinchu, Taiwan | ||
| Author(s): | Shih-Chieh Chang - National Tsing-Hua Univ., Hsinchu, Taiwan Cheng-Tao Hsieh - National Tsing-Hua Univ., Hsinchu, Taiwan Kai-Chiang Wu - National Tsing-Hua Univ., Hsinchu, Taiwan | ||
| 49.2 | Post-Layout Logic Optimization of Domino Circuits | ||
| Speaker(s): | Aiqun Cao - Purdue Univ., West Lafayette, IN | ||
| Author(s): | Aiqun Cao - Purdue Univ., West Lafayette, IN Cheng-Kok Koh - Purdue Univ., West Lafayette, IN | ||
| 49.3s | Multiple Constant Multiplication by Time-Multiplexed Mapping of Addition Chains | ||
| Speaker(s): | Peter Tummeltshammer - Univ. of Technology Vienna, Vienna, Austria | ||
| Author(s): | Peter Tummeltshammer - Univ. of Technology Vienna, Vienna, Austria James C. Hoe - Carnegie Mellon Univ., Pittsburgh, PA Markus Pueschel - Carnegie Mellon Univ., Pittsburgh, PA | ||
| 49.4s | Decomposing Specifications with Concurrent Outputs to Resolve State Coding Conflicts in Asynchronous Logic Synthesis | ||
| Speaker(s): | Mark B. Josephs - London South Bank Univ., London, United Kingdom | ||
| Author(s): | Hemangee K. Kapoor - London South Bank Univ., London, United Kingdom Mark B. Josephs - London South Bank Univ., London, United Kingdom | ||
| 49.5s | A New Heuristic Algorithm for Reversible Logic Synthesis | ||
| Speaker(s): | Pawel Kerntopf - Warsaw Univ. of Tech., Warsaw, Poland | ||
| Author(s): | Pawel Kerntopf - Warsaw Univ. of Tech., Warsaw, Poland | ||
| 49.6s | Quantum Logic Synthesis by Symbolic Reachability Analysis | ||
| Speaker(s): | William N. N. Hung - Intel Corp., Hillsboro, OR | ||
| Author(s): | William N. N. Hung - Intel Corp., Hillsboro, OR Xiaoyu Song - Portland State Univ., Portland, OR Guowu Yang - Portland State Univ., Portland, OR Jin Yang - Intel Corp., Hillsboro, OR Guowu Yang - Intel Corp., Hillsboro, OR Marek Perkowski - Portland State Univ., Portland, OR | ||
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